Capacitance/resistance rodeling and analog performance evaluation of 3-D SOI FinFET structure for circuit perspective applications

• Autorzy: Jain N. , Raj B.
• Języki publikacji: EN

Abstrakty

EN

• Wydawca: -
• Czasopismo: World Scientific News
• Rocznik: 2018
• Tom: 113
• Opis fizyczny: p.194-209,fig.,ref.

Twórcy

autor

Jain N.

• Department of Electronics and Communication Engineering, Dr. B.R. Ambedkar National Institute of Technology (NIT), 144011 Jalandhar (Punjab), India

autor

Raj B.

• Department of Electronics and Communication Engineering, Dr. B.R. Ambedkar National Institute of Technology (NIT), 144011 Jalandhar (Punjab), India